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 PH8230E
N-channel TrenchMOSTM enhanced logic level FET
M3D748
Rev. 03 -- 02 March 2004
Product data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOSTM technology.
1.2 Features
s Low thermal resistance s Low gate drive s SO8 equivalent area footprint s Low on-state resistance.
1.3 Applications
s DC-to-DC converters s Portable appliances s Switched-mode power supplies s Notebook computers.
1.4 Quick reference data
s VDS 30 V s Ptot 62.5 W s ID 67 A s RDSon 8.2 m
2. Pinning information
Table 1: Pin 1,2,3 4 mb Pinning - SOT669 (LFPAK), simplified outline and symbol Description source (s)
mb d
Simplified outline
Symbol
gate (g) mounting base; connected to drain (d)
g s
MBB076
1
2
3
4
MBL286
Top view
SOT669 (LFPAK)
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
3. Ordering information
Table 2: Ordering information Package Name PH8230E LFPAK Description Plastic single-ended surface mounted package; 4 leads Version SOT669 Type number
4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature source (diode forward) current (DC) Tmb = 25 C peak source (diode forward) current Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 33.9 A; tp = 0.15 ms; VDD = 30 V; VGS = 10 V; starting Tj = 25 C Tmb = 25 C; VGS = 10 V; Figure 2 and 3 Tmb = 100 C; VGS = 10 V; Figure 2 Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 Conditions 25 C Tj 150 C Min -55 -55 Max 30 20 67 42 268 62.5 +150 +150 52 150 115 Unit V V A A A W C C A A mJ
Source-drain diode
Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
2 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
120 Pder (%) 80
03aa15
120 Ider (%) 80
03aa23
40
40
0 0 50 100 150 200 Tmb (C)
0 0 50 100 150 200 Tmb (C)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 10 V
ID I der = ------------------- x 100% I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
Fig 2. Normalized continuous drain current as a function of mounting base temperature.
103 ID (A) 102
003aaa369
Limit RDSon = VDS / ID
tp = 10 s 100 s 1 ms
10 DC 10 ms 100 ms 1
10-1 10-1
1
10
VDS (V)
102
Tmb = 25 C; IDM is single pulse; VGS = 10 V
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
3 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
5. Thermal characteristics
Table 4: Rth(j-mb) Thermal characteristics Conditions Min Typ Max Unit 2 K/W thermal resistance from junction to mounting base Figure 4 Symbol Parameter
5.1 Transient thermal impedance
10 Zth(j-mb) (K/W)
003aaa370
= 0.5 1 0.2 0.1 0.05 0.02 single pulse 10-1 10-4
P
=
tp T
tp T
10-3 10-2 10-1
t
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
4 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
6. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified. Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage ID = 250 A; VGS = 0 V ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 150 C IDSS drain-source leakage current VDS = 30 V; VGS = 0 V Tj = 25 C Tj = 150 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 20 V; VDS = 0 V VGS = 10 V; ID = 10 A; Figure 7 and 8 Tj = 25 C Tj = 150 C VGS = 4.5 V; ID = 10 A; Figure 8 Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage IS = 10 A; VGS = 0 V; Figure 12 reverse recovery time IS = 20 A; dIS/dt = -100 A/s; VDS = 20 V VGS = 0 V VDD = 10 V; ID = 10 A; VGS = 4.5 V; RG = 4.7 VGS = 0 V; VDS = 10 V; f = 1 MHz; Figure 11 ID = 20 A; VDD = 10 V; VGS = 5 V; Figure 13 14 5.7 5 527 235 28 44 33 21 0.85 38 1.2 nC nC nC pF pF pF ns ns ns ns V ns 7.6 13 11 8.2 14 13.2 m m m 0.06 20 1 500 100 A A nA 1 0.5 1.7 2.5 V V 30 V Conditions Min Typ Max Unit
1400 -
Source-drain diode
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
5 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
10 ID (A) 8 10 V 4V
003aaa371
10 ID (A) 8
003aaa372
6
6
VGS = 3.2 V
4
Tj = 150 C 25 C
4 3.1 V
2
2
3V 2.9 V
0
0 0 0.5 1 1.5
2.8V 2 VDS (V)
1
2
3
VGS (V)
4
Tj = 25 C
Tj = 25 C and 150 C; VDS > ID x RDSon
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.
Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
100 RDSon (m) 75
003aaa373
2 a 1.5
03aa27
2.9 V 3 V
3.1 V
3.2 V
50
1
VGS = 3.5 V 25 4V 10 V 0 0 2 4 6 8 ID (A) 10
0.5
0 -60 0 60 120 Tj (C) 180
Tj = 25 C
R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.
Fig 7. Drain-source on-state resistance as a function of drain current; typical values.
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
6 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
3 VGS(th) (V) 2 typ max
003aaa414
10-2 ID (A)
03am28
10-3
min
typ
max
1
min
10-4
0 -60
10-5 0 60 120 Tj (C) 180 0 1 2 VGS (V) 3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = 5 V
Fig 9. Gate-source threshold voltage as a function of junction temperature.
Fig 10. Sub-threshold drain current as a function of gate-source voltage.
104 C (pF)
003aaa374
103
Ciss
Coss
Crss
102 10-1 1 10 VDS (V) 102
VGS = 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
7 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
10 IS (A) 8
003aaa375
10 VGS
(V)
003aaa376
8
6
6
4
Tj = 150 C 25 C
4
2
2
0 0 0.2 0.4 0.6 0.8 1 VSD (V)
0 0 10 20 QG (nC)
30
Tj = 25 C and 150 C; VGS = 0 V
ID = 20 A; VDD = 10 V
Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.
Fig 13. Gate-source voltage as a function of gate charge; typical values.
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
8 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
7. Package outline
Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads SOT669
E b2 L1
A c2
A2
C E1 b3
mounting base D1 H D
b4
L2
1
e
2
3
b
1/2 e
4
X wM A c
A A1 C
(A 3)
detail X L yC 0 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 8 0
1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62
0.25 0.30 4.10 4.20 0.19 0.24 3.80
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 03-02-05 03-09-15
Fig 14. SOT669 (LFPAK).
9397 750 12946 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
9 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
8. Revision history
Table 6: Rev Date 03 20040302 Revision history CPCN Description Product data (9397 750 12946) Modifications:
*
02 20030429 -
tr data revised in Table 5 "Characteristics"
Product data (9397 750 11388) Modifications:
* * *
01 20030304 -
Avalanche ruggedness data added in Table 3 Qg(tot) data revised in Table 5 IGSS data revised in Table 5
Preliminary data (9397 750 11145)
9397 750 12946
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
10 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
9. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
10. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
12. Trademarks
TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V.
11. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 12946
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 -- 02 March 2004
11 of 12
Philips Semiconductors
PH8230E
N-channelTrenchMOSTM enhanced logic level FET
Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 5.1 6 7 8 9 10 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
(c) Koninklijke Philips Electronics N.V. 2004. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 02 March 2004 Document order number: 9397 750 12946


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